Fault-tolerant semi fast implementations of atomic read/write registers

Chryssis Georgiou, Nicolas C. Nicolaou, Alexander A. Shvartsman

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations


This paper investigates time-efficient implementations of atomic read-write registers in message-passing systems where the number of readers can be unbounded. In particular we study the case of a single writer, multiple readers, and S servers, such that the writer, any subset of the readers, and up to t servers may crash. A recent result of Dutta et al. [3] shows how to obtain fast implementations in which both reads and writes complete in one communication round-trip, under the constraint that the number of readers is less than S/t -2, where t <S/2. In that same paper the authors pose a question of whether it is possible to relax the bound on readers, and at what cost, if semifast implementations are considered, i.e., implementations that have fast reads or fast writes. This paper provides an answer to this question. It is shown that one can obtain implementations where all writes are fast, i.e., involving a single round-trip communication, and where reads complete in one to two communication rounds under the assumption that no more than S <S/2 f servers crash. Simulated scenarios included in this paper indicate that only a small fraction of reads require a second communication round. Interestingly the correctness of the implementation does not depend on the number of concurrent readers in the system. The solution is obtained with the help of non-unique virtual ids assigned to each reader, where the readers sharing a virtual id form a virtual node. For the proposed definition of semifast implementations it is shown that implementations satisfying certain assumptions are semifast if and only if the number of virtual ids in the system is less than 7 -2. This result is proved to be tight in terms of the required communication. It is shown that only a single complete two-round read operation may be necessary for each write operation. It is furthermore shown that no semifast implementation exists for the multi-reader, multi-writer model.

Original languageEnglish (US)
Title of host publicationSPAA 2006
Subtitle of host publication18th Annual ACM Symposium on Parallelism in Algorithms and Architectures
PublisherAssociation for Computing Machinery (ACM)
Number of pages10
ISBN (Print)1595934529, 9781595934529
StatePublished - 2006
Externally publishedYes
EventSPAA 2006: 18th Annual ACM Symposium on Parallelism in Algorithms and Architectures - Cambridge, MA, United States
Duration: Jul 30 2006Aug 2 2006

Publication series

NameAnnual ACM Symposium on Parallelism in Algorithms and Architectures


ConferenceSPAA 2006: 18th Annual ACM Symposium on Parallelism in Algorithms and Architectures
Country/TerritoryUnited States
CityCambridge, MA


  • Atomicity
  • Communication rounds
  • Distributed algorithms
  • Fault-tolerance
  • Read/Write registers

ASJC Scopus subject areas

  • Engineering(all)


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