TY - GEN
T1 - Optimizing Data Retrieval from Secondary Storage with a Proactive Intermediate Cache
AU - Verma, Salil
AU - Allah, Ahmad Jad
AU - Al-Mamun, Abdullah
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - As data volume expands exponentially, efficiently retrieving data from secondary storage has become a pivotal challenge. Secondary storage devices like hard disk drives often impose high latency during data accesses, adversely impacting overall system performance. To address this issue, we propose NestEgg, an innovative intermediate cache architecture tailored to accelerate data retrieval from secondary storage. NestEgg employs an intelligent, proactive caching strategy that selectively stores frequently accessed data in a dedicated low-latency external cache memory. NestEgg enables faster I/O operations and enhances the system's responsiveness by reducing the likelihood of fetching data from slower secondary storage. We outline the architecture of NestEgg and experimentally demonstrate its efficacy in boosting performance for realistic workloads through simulations. The results validate that NestEgg can substantially improve I/O access times over conventional storage hierarchies across numerous scenarios and access patterns. Overall, our solution delivers a promising advancement in bridging the latency gap between primary memory and secondary storage.
AB - As data volume expands exponentially, efficiently retrieving data from secondary storage has become a pivotal challenge. Secondary storage devices like hard disk drives often impose high latency during data accesses, adversely impacting overall system performance. To address this issue, we propose NestEgg, an innovative intermediate cache architecture tailored to accelerate data retrieval from secondary storage. NestEgg employs an intelligent, proactive caching strategy that selectively stores frequently accessed data in a dedicated low-latency external cache memory. NestEgg enables faster I/O operations and enhances the system's responsiveness by reducing the likelihood of fetching data from slower secondary storage. We outline the architecture of NestEgg and experimentally demonstrate its efficacy in boosting performance for realistic workloads through simulations. The results validate that NestEgg can substantially improve I/O access times over conventional storage hierarchies across numerous scenarios and access patterns. Overall, our solution delivers a promising advancement in bridging the latency gap between primary memory and secondary storage.
KW - data access optimization
KW - intermediate cache
KW - secondary storage
KW - storage architecture
KW - system performance
UR - https://www.scopus.com/pages/publications/85191753115
UR - https://www.scopus.com/pages/publications/85191753115#tab=citedBy
U2 - 10.1109/SoutheastCon52093.2024.10500105
DO - 10.1109/SoutheastCon52093.2024.10500105
M3 - Conference contribution
AN - SCOPUS:85191753115
SN - 9798350317107
T3 - Conference Proceedings - IEEE SOUTHEASTCON
SP - 216
EP - 221
BT - SoutheastCon 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2024 IEEE SoutheastCon, SoutheastCon 2024
Y2 - 15 March 2024 through 24 March 2024
ER -